Honorary Guest Professor
Full-time Faculty Members
Center for Energy-Efficient Computing and Applications
School of Electrical Engineering and Computer Science
Research Interests: physical design automation,
scalable algorithms, 3D integration
Guojie Luo received his B.S. degree (with honors) in Computer Science from Peking University, Beijing, China in 2005, the M.S. and Ph.D. degrees in Computer Science from the University of California, Los Angeles in 2008 and 2011, respectively. He was with IBM T.J. Watson Research Center as a research intern from 2008 to 2011. He joined the faculty of Center for Energy-Efficient Computing and Applications (CECA), School of Electrical Engineering and Computer Science (EECS) at Peking University from August 2011. His current research interests include physical design automation, scalable algorithms, and advanced design technologies for 3D ICs.
He published 10+ conference papers, 3 journal papers, and 2 book chapters. He served as a TPC member of ASP-DAC 2013,2014, NanoArch 2013,2014, ISPD 2014, and ICCAD 2014; he also served as a reviewer for the following publications: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE Transactions on Very Large Scale Integration Systems (TVLSI), ACM Transactions on Reconfigurable Technology and Systems (TRETS), ACM Journal of Emerging Technologies in Computing (JETC), and Integration, the VLSI Journal (INTEGRATION). He designed and implemented 3D-Craft, a state-of-the-art 3D physical design flow, and his PhD thesis "Placement and Design Planning for 3D Integrated Circuits" won the 2013 ACM SIGDA Outstanding PhD Dissertation Award in Electronic Design Automation. He and his colleagues developed mPL11, a routability-driven placer that won the 2nd place in the ISPD 2011 placement contest.
- Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun: Rapid Design Space Exploration of Two-Level Unified Caches. ISCAS 2014: to appear.
- Chang-Cheng Tsai, Yiyu Shi, Guojie Luo, Iris Hui-Ru Jiang: FF-bond: multi-bit flip-flop bonding at placement. Proceedings of the 2013 ACM international symposium on International symposium on physical design (ISPD 2013): pp. 147-153. (Nominated for Best Paper Award)
- Jason Cong, Guojie Luo, Kalliopi Tsota, Bingjun Xiao: Optimizing routability in large-scale mixed-size placement. Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013): pp. 441-446.
- Peng Li, Yuxin Wang, Peng Zhang, Guojie Luo, Tao Wang, Jason Cong: Memory partitioning and scheduling co-optimization in behavioral synthesis. Proceedings of the 2012 International Conference on Computer-Aided Design (ICCAD 2012): pp. 488-495.
- Jason Cong, Bin Liu, Guojie Luo, Raghu Prabhakar: Towards layout-friendly high-level synthesis. Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design (ISPD 2012): pp. 165-172.
- Guojie Luo: Physical hierarchy exploration of 3D processors. Proceedings of the 2011 International SoC Design Conference (ISOCC 2011): pp. 139-141.
- previous publications at UCLA
- Guojie Luo, Yiyu Shi, Jason Cong: An Analytical Placement Framework for 3D ICs and Its Extension on Thermal-Awareness. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD 2013): vol. 32, no. 4, pp. 510-523.
- previous publications at UCLA
- MoE 20120001120124, "Highly Scalable Placement Algorithm for 2.5D Heterogeneous FPGAs", Principal Investigator, Jan/2013 - Dec/2015.
- NSFC 61202073, "Accelerating Placement and Routing Algorithms for FPGA Co-Processors," Principal Investigator, Jan/2013 - Dec/2015.
- 04830050 "Data Structures and Algorithms (A)," Fall 2012, 2013.
- 04832240 "Introduction to Parallel and Distributed Computing," Spring 2012, 2013, 2014.