2017

Chao Zhang

Chao Zhang is a third-year Ph.D student of Peking University, advised by Prof. Guangyu Sun. He received his B.S. from Peking University in 2012, majored in Microelectronics. His current research interest includes memory subsystem architecture optimization for non-volatile memory, reliability design of racetrack memory, and FPGA-based software acceleration. He is also interested in software system developing based on SoC, PC, and Mobile platforms. He has a best paper award (ASP-DAC'15).

Mail: zhang.chao [AT] pku.edu.cn

Tools

For racetrack memory patch used in NVsim, please find here.

 

Publications

Papers about Racetrack Memory (a.k.a Domain Wall Memory)

  1. Guangyu Sun, Chao Zhang, Peng Li, Tao Wang, and Yiran Chen, "Statistical Cache Bypassing for Non-Volatile Memory," IEEE Transactions on Computers (IEEE TC), . 
  2. Weiqi Zhang, Chao Zhang, and Guangyu Sun, "Accelerate Context Switch by Racetrack-SRAM Hybrid Cells,"in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), July 18-20, 2016, Beijing, China, .
  3. Xiaoyang Wang, Chao Zhang, Xian Zhang, and Guangyu Sun, "np-ECC: Nonadjacent Position Error Correction Code for Racetrack Memory," in Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH 2016), July 18-20, 2016, Beijing, China, .
  4. Yue Zhang, Chao Zhang, Jiang Nan, Zhizhong Zhang, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, and Weisheng Zhao, "Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System," IEEE Transactions on Circuits and Systems (IEEE TCAS), Vol. 63, No. 5, pp. 629-638, May 2016.
  5. Qingda Hu, Guangyu Sun, Jiwu Shu, and Chao Zhang, "Exploring Main Memory Design Based on Racetrack Memory Technology," in Proceedings of the 26th ACM Great Lakes Symposium on VLSI (GLSVLSI 2016), May 18-20, 2016, Boston, MA, USA, pp. 397-402.
  6. Shuo Wang, Yun Liang, Chao Zhang, Xiaolong Xie, Guangyu Sun, Yongpan Liu, Yu Wang, and Xiuhong Li,"Performance-centric Register File Design for GPUs using Racetrack Memory," in Proceedings of the 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016), January 25-28, 2016, Macao, China, pp. 25-30.
  7. Hongbin Zhang, Chao Zhang, Xian Zhang, Guangyu Sun, and Jiwu Shu, "Pin Tumbler Lock: A Shift based Encryption Mechanism for Racetrack Memory," in Proceedings of the 21st Asia and South Pacific Design Automation Conference (ASP-DAC 2016), January 25-28, 2016, Macao, China, pp. 354-359.
  8. Chao Zhang, Guangyu Sun, Xueying Zhang, and Weisheng Zhao, "Thermal Modeling and Architecture Level Temperature Management for Shift Operations of Racetrack Memory," in Proceedings of the 21th National Conference of Information Storage (NCIS 2015), September 17-18, 2015, Changsha, China, .
  9. Haiyu Mao, Chao Zhang, Guangyu Sun, and Jiwu Shu, "Exploring Data Placement in Racetrack Memory based Scratchpad Memory," in Proceedings of the 4th IEEE Non-Volatile Memory System and Applications Symposium (NVMSA 2015), August 19-21, 2015, Hong Kong, China, pp. 1-5.
  10. Chao Zhang, Guangyu Sun, Xian Zhang, Weiqi Zhang, Weisheng Zhao, Tao Wang, Yun Liang, Yongpan Liu, Yu Wang, and Jiwu Shu, "Hi-fi Playback: Tolerating Position Errors in Shift Operations of Racetrack Memory," in Proceedings of the 42nd ACM/IEEE International Symposium on Computer Architecture (ISCA 2015), June 13-17, 2015, Portland, OR, USA, pp. 694-706.
  11. Yue Zhang, Chao Zhang, Jiang Nan, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, and Weisheng Zhao, "Perspectives of Racetrack Memory Based on Current-Induced Domain Wall Motion: From Device to System," in Proceedings of 2015 IEEE International Symposium on Circuits and Systems (ISCAS 2015), May 24-27, 2015, Lisbon, Portugal, pp. 381-384.
  12. Hehe Li, Yongpan Liu, Qinghang Zhao, Guangyu Sun, Chao Zhang, Yizi Gu, Rong Luo, Huazhong Yang, Meng-Fan Chang and Xiao Sheng, "An Energy Efficient Backup Scheme with Low Inrush Current for Nonvolatile Sram in Energy Harvesting Sensor Nodes," in Proceedings of the 18th Design, Automation and Test in Europe (DATE 2015), March 9-13, 2015, Grenoble, France, pp. 7-12.
  13. Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafie Ravelosona, Yongpan Liu, Weisheng Zhao and Huazhong Yang, "From Device To System: Cross-Layer Design Exploration of Racetrack Memory," in Proceedings of the 18th Design, Automation and Test in Europe (DATE 2015), March 9-13, 2015, Grenoble, France, pp. 1018-1023.
  14. Chao Zhang, Guangyu Sun, Weiqi Zhang, Fan Mi, Hai Li, and Weisheng Zhao, "Quantitative Modeling of Racetrack Memory, A Tradeoff among Area, Performance, and Power," in Proceedings of the 20th Asia and South Pacific Design Automation Conference (ASP-DAC 2015), January 19-22, 2015, Chiba, Japan, pp. 100-105. 

Other topics related to Non-volatile Memories (NVMs)

  1. Xian Zhang, Guangyu Sun, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, and Jia Di, "Fork Path: Improving Efficiency of ORAM by Removing Redundant Memory Accesses," in Proceedings of the 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2015), December 5-9, 2015, Waikiki, Hawaii, pp. 102-114.
  2. Chao Zhang, Guangyu Sun, Peng Li, Tao Wang, Dimin Niu, and Yiran Chen, "SBAC: A Statistics based Cache Bypassing Method for Asymmetric-access Caches," in Proceedings of IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED 2014), August 11-13, 2014, Jolla, CA, USA, pp. 345-350.
  3. Xian Zhang, Chao Zhang, Tao Zhang, Guangyu Sun, and Jia Di, "An Efficient Run-time Encryption Scheme for Non-volatile Main Memory," in Proceedings of International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2013), September 29 - October 4, 2013, Montreal, Canada, pp. 1-10.