2018

谢小龙  Xiaolong Xie

教育背景 
2009.9 - 2013.7 北京大学信息科学技术学院微电子学系 本科生 
2013.9 - 2018.7 北京大学信息科学技术学院计算机系 博士研究生 

研究兴趣 : 通用图形处理器,异构计算等 

编程语言 : C/C++, Python, Ruby, CUDA, OpenCL, Java 

指导老师 : 梁云 

联系我: xiexl_pku at pku dot edu dot cn

 

 
 
论文
[ICCAD'2017] Yun Liang, Xiuhong Li, Xiaolong Xie, "Exploring Cache Bypassing and Partitioning for MultiTasking on GPUs", International Conference on Computer-Aided Design, 2017.
[HPDC'2017] Xiaolong Xie, Wei Tan, Liana Fong, Yun Liang, "CuMF_SGD:  Parallelized Stochastic Gradient  Descent  for Matrix Factorization on GPUs", International Symposium on High-Performance Parallel and Distributed Computing, 2017.
[ASP-DAC'2016] Shuo Wang, Yun Liang, Chao ZhangXiaolong Xie, Guangyu Sun, Yongpan Liu, Yu Wang, Xiuhong Li, "Performance-centric Register File Design for GPUs using Racetrack Memory",. The 21st Asia and South Pacific Design Automation Conference, 2016.
[MICRO'2015] Xiaolong Xie, Yun Liang, Xiuhong Li, Yudong Wu, Guangyu Sun, Tao Wang, Dongrui Fan, "Enabling Coordinated Register Allocation and Thread-level Parallelism Optimization for GPUs", 2015 48th International Symposium on Microarchitectiure(MICRO).
[HPCA'2015] Xiaolong Xie, Yun Liang, Yu Wang, Guangyu Sun, Tao Wang, "Coordinated Static and Dynamic Cache Bypassing for GPUs", International Conference on High Performance Computer Architecture, 2015.
[TCAD'2015] Yun Liang, Xiaolong Xie, Guangyu Sun, Deming Chen, "An Efficient Compiler Framework for Cache Bypassing on GPUs" , IEEE Transactions on Computer-aided Design, 2015.
[ICCAD'2013] Xiaolong Xie, Yun Liang, Guangyu Sun, Deming Chen, "An Efficient Compiler Framework for Cache Bypassing on GPUs", International Conference On Computer-aided Design, 2013.
 
 
工作经历
Research Intern, 2016.6 - 2016.11, IBM Thomas J. Watson Research Center, New York, U.S.