客座教授

Professor Wayne Luk


Address: Department of Computing, Imperial College London, 180 Queen's Gate, London SW7 2BZ, England
Email: wl 'at' doc.ic.ac.uk

 


I teach and research in Department of Computing at Imperial College London. I lead the Programming Languages and Systems Section and the Custom Computing Research Group, and I direct the EPSRC Centre for Doctoral Training in High Performance Embedded and Distributed Systems and the Centre for Advanced Financial Engineering. I was Visiting Professor at Stanford University from November 2006 until August 2009. I am a Fellow of the Royal Academy of Engineering, the IEEE, and the BCS. I am also a Senior Advisor of Maxeler, and the Honorary Fellowship Advisor of the Croucher Foundation.

My research interests include:

  • architectures, design methods, languages, tools and models for customising computation, particularly those involving reconfigurable devices such as field-programmable gate arrays, and
  • their use in improving design efficiency and designer productivity for demanding applications, such as high-performance financial computing and embedded biomedical systems.

My research group is currently focusing on theory and practice of reconfigurable architectures and the associated compilation techniques; see my selected publications, the college repository, or the DBLP list for details. In particular, I take part in the project Application Customisation: Enhancing Design Quality and Developer Productivity and POETS (Partially Ordered Event Triggered Systems) supported by the Engineering and Physical Sciences Research Council, and the European Horizon 2020 project EXTRA (Exploiting eXascale Technology with Reconfigurable Architectures). Past projects include TETRACOM (Technology Transfer in Computing Systems), Custom Computing for Advanced Digital Systems, HARNESS (Hardware- and Network-Enhanced Software Systems for Cloud Computing), EPiCS (Engineering Proprioception in Computing Systems), FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration), REFLECT, HARTES, and DIADEM.

Our research has led to a Research Excellence Award from Imperial College in 2006, as well as many awards at international conferences, including ASAP (2008, 2013, 2016), ARC (2012), FCCM (2012), FPL (2004, 2007, 2008, 2010, 2014), ERSA (2004), FPT (2005, 2008), SAMOS (2008), and SPL (2008, 2009). My research studies have been supported by various agencies including UK Engineering and Physical Sciences Research Council, European Framework 6 and Framework 7 programmes, Algotronix, Altera, Celoxica, Cisco, Hewlett Packard, Huawei, Intel, Maxeler, Mirosoft, J.P. Morgan, Morgan Stanley, Nokia, QinetiQ, Sharp Laboratories of Europe, Sony, and Xilinx.

The courses that I teach include Computer Architecture and Custom Computing.

I was privileged to co-found three great forums: International Conference on Field Programmable Logic and Applications, International Conference on Field Programmable Technology, and International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies. I co-chaired the ASAP'07 conference which was held during 8-11 July 2007 in Montreal, the FPT'02 conference which was held during 16-18 December 2002 in Hong Kong, the FPL'97 Workshop which was held during 1-3 September 1997 in London, and the FPL'15 conference which was held during 2-4 September 2015 in London.

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